1. Field of the Invention
The present invention relates to a motor driving apparatus capable of being optimally operated in driving a motor.
2. Description of the Related Art
A brushless direct current (BLDC) motor generally means a DC motor able to conduct a current or adjust a current direction using a non-contact position detector and a semiconductor element rather than using a mechanical contact unit such as a brush, a commutator, or the like, in a DC motor.
In order to drive the BLDC motor, a driving apparatus may be used.
FIG. 1 is a configuration diagram of a general motor driving apparatus.
Referring to FIG. 1, a general motor driving apparatus 10 may include a controlling unit 11 and a driving unit 12.
The controlling unit 11 may control driving of the motor, and the driving unit 12 may drive the motor by turning four field effect transistors (FETs) on or off according to a driving signal of the controlling unit 11.
FIG. 2 is a diagram showing driving signals of the motor driving apparatus.
Referring to FIG. 2, the driving signals transferred from the controlling unit 11 to the driving unit 12 may be divided into four types thereof and may be transferred in a sequence of identification numerals {circle around (1)}, {circle around (2)}, {circle around (3)}, and {circle around (4)}.
That is, a first PMOS FET P1 and a second NMOS FET N2 may be turned on by a driving signal represented by identification numeral {circle around (1)}, and the first PMOS FET P1 and the second NMOS FET N2 may be turned off while a second PMOS FET P2 and a first NMOS FET N1 may be turned on by a driving signal represented by identification numeral {circle around (2)}.
Again, the second PMOS FET P2 and the first NMOS FET N1 may be turned off and the first PMOS FET P1 and the second NMOS FET N2 may be turned on by a driving signal represented by identification numeral {circle around (3)}, and the first PMOS FET P1 and the second NMOS FET N2 may be turned off and the second PMOS FET P2 and the first NMOS FET N1 may be turned on by a driving signal represented by identification numeral {circle around (4)}.
In this driving scheme, when the first PMOS FET P1 and the second PMOS FET P2 are turned on, pulse width modulation (PWM) signals (oblique line portions of FIG. 2) are generated, whereby a speed of the motor may be adjusted.
This motor driving apparatus attaches importance to driving efficiency in driving the motor using a PWM signal, in like manner to the following Related Art Document. However, driving efficiency may not be optimized, due to a phase difference between current applied to the motor and voltage detected from the motor.